OCT. 20, 2026 (英语).
Model Explorer超越了高级模型图。 查看自定义编译器 IRs 中的 Arm 插件，验证 NPU 任务侧面，并直接将周期级剖析的痕迹映射到您的执行图上。
机器学习模型在当地运行在广泛的硬件上，从低功率边缘设备到游戏图形和物理AI系统。 在这些目标上高效运行的模型需要编译步骤，如量化、降低图表、操作员聚变和硬件授权。
Arm使用Google AI Edge Model Explorer，让开发者在这些管道中的能见度。 有了Model Explorer的分级图形可视化和插件架构，Arm建造了几台开源适配器，使边缘模型变换更容易检查。
在向硬件边缘部署模型时，一个框架变化或操作者约束可以改变导出的执行图。 工程师往往需要回答三个问题：
- 结构完整性：图表降低是否引入了诸如额外布局转换等意想不到的运算符？
- 硬件代表团：该型号是完全委托给NPU还是GPU，还是没有支持的子图会掉回CPU?
- 循环级瓶颈：下图中哪些节点采用最计算周期？
通过读取原始的平面图或文本日志来回答这些问题需要时间，特别是对于大型语言模型(LLMs)和神经网络。 Arm需要一个可视化工具来检查Arm特定中间表示和硬件剖面痕迹。
为应对这些部署挑战，Arm为Google AI Edge Model Explorer开发了自定义适配器，以支持几种模式格式(即TOSA,VGF，和PTE)，为端侧优化建立了全面的视觉工作流程。 利用这些扩展，工程组可以验证出口管道，验证加速器授权，并在模型图上直接确定周期级性能瓶颈：
装甲工程师使用Model Explorer验证通过ExecuTorch Arm后端输出的PyTorch训练神经超級采样(NSS)模型，作为Vulkan ML扩展的VGF文件。 在检查VGF图时，团队通过ExecuTorch Arm后端的改变发现了意想不到的TransPOSE运营商推出。
图1:VGF格式的输出NSS模型概览，显示图分区及其与模型输入和输出的连接。
Model Explorer使用户能够检查模型图的单个节点，例如下面所描绘的重新缩放操作员，显示操作员的属性和SPIR-V lamor连接。 这一功能协助Arm小组在无需人工分析原始日志文件的情况下查明和解决回归问题。
图2:NSS图的详细视图，显示一个带有其属性和SPIR-V输入和输出连接的选定重级操作员。
为了优化Arm Ethos-U85 NPU等加速器的视觉模型，Arm工程师使用Model Explorer的分页视图来比较CPU和NPU授权的图表并列一个超解YOLO模型。
分裂面板视图显示了结构差异：CPU图显示每个单个层，而NPU图则将网络组合成一个EthosUBackend区块，介于对节点进行定量和分级。 对于LiteRT或ExecuTorch中部分支持的模型，此视图有助于识别未授权的操作符和拆分子图。
图3a：分页视图中的超解YOLO模型CPU图
图3b：分页视图中的超解YOLO模型NPU图
为了在Ethos-U NPU上找到延迟瓶颈，Arm在他们的固定虚拟平台模拟器(FVP)上运行了他们的模型，并使用Model Explorer的节点数据插件将周期精确的执行痕迹覆盖到图表上。 彩色编码热映射显示，一个单一的TRANSOSE节点是主要的懒惰瓶颈。
图4. 突出显示的性能数据覆盖了明显的显示的瓶颈位置。
你可以使用Google AI边际模型探索器与Arm的开源适配器一起在本地通过PyPI或GitHub检查和优化自己的端侧模型。
- 安装 Google AI 边缘模型探索器
- 为您的模型格式安装适配器和发布模型探索器。
- LiteRT适配器(内置)
- PyTorch适配器(内置)
- Hugging Face变形器适配器(内建)
- TOSA 适配器(Arm插件)
- VGF 适配器(Arm插件)
- PTE 适配器(Arm插件)
- 见用户指南并尝试主要功能：
特别感谢各Arm和Google AI Edge团队在这些适配器和集成方面所做的工作：
工程师：
- 亚美尼亚：纳鲁莫尔·普朗纳瓦拉特、约书亚·斯莱特、斯特凡娜·西米翁、亚当·霍德森、阿罗纳·埃纳格特-莫尼、阿龙·维吉纳斯-塔尔、凯里·威廉姆斯、格莱布·维尼琴科、哈姆扎·阿尔斯兰、马科·多明戈、马修·斯洛扬、迈克尔·麦克库尔丁、米奇·贝利、理查德·伯顿、罗伯特·休斯、罗伯特·泰勒、托马斯·阿古斯丁·冈萨雷斯·奥兰多
- Google：阿兰·马、埃里克·杨、金、娜丽
产品经理：查理·斯托克斯(亚美尼亚)、德里克·贝克布雷德
设计师：阿米·库博塔，约安尼斯·波利蒂斯(亚美尼亚)，凯瑟琳·洛，菲利普·沃森(亚美尼亚)
高级赞助商：巴拉·加图(亚美尼亚)、科马克·布里克、乔·阿尔德森(亚美尼亚)、马蒂亚斯·格伦德曼、沙巴尼·罗伊(亚美尼亚)
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OCT. 20, 2026
Model Explorer goes beyond high-level model graphs. See how Arm plugs in custom compiler IRs, verifies NPU delegation side-by-side, and maps cycle-level profiling traces directly onto your execution graph.
Machine learning models run locally on a wide range of hardware, from low-power edge devices to gaming graphics and physical AI systems. Running models efficiently on these targets requires compilation steps such as quantization, graph lowering, operator fusion, and hardware delegation.
Arm used Google AI Edge Model Explorer to give developers visibility into these pipelines. With Model Explorer's hierarchical graph visualization and plugin architecture, Arm built several open-source adapters that make edge model transformations easier to inspect.
When deploying a model to edge hardware, a framework change or operator constraint can alter the exported execution graph. Engineers often need to answer three questions:
- Structural integrity: Did graph lowering introduce unintended operators such as extra layout transposes?
- Hardware delegation: Is the model fully delegated to the NPU or GPU, or are unsupported subgraphs falling back to the CPU?
- Cycle-level bottlenecks: Which nodes in the lowered graph take the most compute cycles?
Answering these questions by reading raw flatbuffers or text logs takes time, especially for large language models (LLMs) and neural networks. Arm needed a visual tool to inspect Arm-specific intermediate representations and hardware profiling traces.
To address these deployment challenges, Arm developed custom adapters for Google AI Edge Model Explorer to support several model formats (i.e., TOSA, VGF, and PTE), establishing a comprehensive visual workflow for on-device optimization. Using these extensions, engineering teams can validate exported pipelines, verify accelerator delegation, and pinpoint cycle-level performance bottlenecks directly on the model graph:
Arm engineers used Model Explorer to validate a PyTorch-trained Neural Super Sampling (NSS) model exported through the ExecuTorch Arm backend as a VGF file for Vulkan ML Extensions. While inspecting the VGF graph, the team found unintended TRANSPOSE operators introduced by a change in the ExecuTorch Arm backend.
Figure 1: Overview of the exported NSS model in VGF format, showing the graph partition and its connections to the model inputs and outputs.
Model Explorer enables users to inspect individual nodes of the model graph, such as the rescale operator depicted below, which displays the operator's attributes and SPIR-V tensor connections. This functionality assisted the Arm team in identifying and resolving the regression without requiring manual analysis of raw log files.
Figure 2: Detailed view of the NSS graph, showing a selected rescale operator with its attributes and SPIR-V input and output connections.
To optimize vision models for accelerators like the Arm Ethos-U85 NPU, Arm engineers used Model Explorer's split-pane view to compare CPU and NPU-delegated graphs side-by-side for a Ultralytics YOLO model.
The split-pane view showed the structural difference: the CPU graph displays each individual layer, while the NPU graph groups the network into a single EthosUBackend block between quantize and dequantize nodes. For partially supported models in LiteRT or ExecuTorch, this view helps identify un-delegated operators and split subgraphs.
Figure 3a: Ultralytics YOLO model CPU graph in split-pane view
Figure 3b: Ultralytics YOLO model NPU graph in split-pane view
To find latency bottlenecks on the Ethos-U NPU, Arm ran their model on their Fixed Virtual Platform (FVP) simulator and used Model Explorer's node data plugin to overlay cycle-accurate execution traces onto the graph. Color-coded heatmaps showed that a single TRANSPOSE node was the main latency bottleneck.
Figure 4. Highlighted performance data overlay that clearly shows where the bottleneck is.
You can use Google AI Edge Model Explorer along with Arm's open-source adapters today to inspect and optimize your own on-device models locally via PyPI or GitHub.
- Install Google AI Edge Model Explorer
- Install adapter and launch Model Explorer for your model format.
- LiteRT adapter (built-in)
- PyTorch adapter (built-in)
- Hugging Face Transformers adapter (built-in)
- TOSA adapter (Arm plugin)
- VGF adapter (Arm plugin)
- PTE adapter (Arm plugin)
- See User Guide and try out major features:
Special thanks to the contributors across the Arm and Google AI Edge teams for their work on these adapters and integrations:
Engineers:
- ARM: Narumol Prangnawarat, Joshua Slater, Stefana Simion, Adam Hodson, Alona Enraght-Moony, Áron Virginás-Tar, Carey Williams, Gleb Vinnychenko, Hamza Arslan, Marco Domingo, Matthew Sloyan, Michael Mc Curtin, Mitch Bailey, Richard Burton, Robert Hughes, Robert Taylor, Tomás Agustín González Orlando
- Google: Alan Ma, Eric Yang, Jing Jin, Na Li
Product manager: Charlie Stokes (ARM), Derek Bekebrede
Designers: Ami Kubota, Ioannis Politis (ARM), Kathleen Low, Philip Watson (ARM)
Senior Sponsors: Bala Gattu (ARM), Cormac Brick, Joe Alderson (ARM), Matthias Grundmann, Sharbani Roy (ARM)
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